1. Field of the Invention
The present invention relates to a self-diagnostic circuit for diagnosing logic circuit blocks of a VLSI, and particularly to a self diagnostic circuit that can select a particular one of the logic circuit blocks in order to diagnose the quality of the block.
2. Description of the Prior Art
It is generally known to incorporate a diagnostic circuit in a VLSI (very large scale integrated circuit) to self-diagnose logic circuit blocks of the VLSI with a simple signal input externally to the diagnostic circuit. As VLSIs become more integrated, complicated and functionally diverse, a self-diagnostic system that can diagnose such a VLSI more easily is required.
Generally, a self-diagnostic system for diagnosing a logic circuit is based on signature analysis. An output register of a circuit block to be diagnosed forms a linear feedback shift register (LFSR). A test pattern generator generates test patterns, which are applied to the circuit block to be diagnosed. Outputs of the circuit block are sequentially applied to the LFSR. This operation is called "signature compression." After the completion of a predetermined diagnostic sequence, the contents (signature of diagnosis) of the LFSR are compared with predetermined values to automatically diagnose the quality of the circuit block.
There are various forms for judging a result of self-diagnosis. For example, as described in the above, a VLSI chip incorporating a self-diagnostic circuit may have a comparison circuit that compares a result of self-diagnosis with a predetermined value. A self-diagnostic result based on the comparison is represented with a simple quality signal that is outputted to an upper level controller or externally of the VLSI chip.
Since it is not always necessary to implement the predetermined value on the chip, the self-diagnostic result may be stored in a register that is readable externally of the chip. Then, the quality judgment is carried out under higher level control such as machine language instruction program control, or with the use of an LSI tester.
The register for storing the self-diagnostic result may be a register different from output registers of the circuit blocks that have been self diagnosed, or the output registers of the circuit blocks that constitute an LFSR at the time of self-diagnosis may themselves be used as means for storing the diagnostic result. The reason for this is because the contents (signature) of the LFSR represent histories of patterns applied in the self-diagnosis. Therefore, it is common to use the output registers of the circuit blocks to be diagnosed as the means for storing the diagnostic result.
FIG. 1b is a block diagram showing a self-diagnostic circuit according to the prior art. The prior art self-diagnostic circuit comprises circuit blocks 1-1, 1-2 and 1-3 to be diagnosed, flip-flops (FFs) 2-1, 2-2 and 2-3 each of which has an output which indicates whether or not the diagnosis is being carried out, flip-flops (FFs) 3-1, 3-2 and 3-3 for storing diagnosis resultant data, OR gates 4-1, 4-2 and 4-3, and an AND gate 5.
In FIG. 1b, a reset signal R is inputted through an input line l.sub.1, and a start signal ST is inputted through an input line l.sub.2. End signals EN.sub.1, EN.sub.2 and EN.sub.3 are outputted through output lines l.sub.3, l.sub.4 and l.sub.5. "GOOD" resultant signals are outputted through lines l.sub.6, l.sub.7 and l.sub.8. A self-diagnosis "GOOD" resultant signal G is outputted through a line l.sub.9.
Each of the FFs 2-1 to 2-3 and 3-1 to 3-3 is a D-type FF as shown in FIG. 2a. According to a clock signal CLK, the FF latches "GOOD" resultant signals (G.sub.1, G.sub.2, G.sub.3) provided through a terminal A. Further, according to the clock signal CLK, the FF outputs the latched start signal ST, end signals EN.sub.1, EN.sub.2, and "GOOD" resultant signals (G.sub.1, G.sub.2, G.sub.3) through a terminal B. The clock signal CLK is not shown in FIG. 1b.
To carry out the self-diagnosis in the arrangement of FIG. 1b, the reset signal R (=1) is input to the blocks 1-1 to 1-3 through the line l.sub.1 to initialize the circuit as a whole. Then, the FFs 2-1 to 2-3 and 3-1 to 3 3 are all reset. AT the same time, input registers, output registers, counters, etc., that are incorporated in the circuit blocks 1-1 to 1-3 but not shown in the figure are reset.
After that, the reset signal R is returned to 0. The start signal ST (=1) is input through the line l.sub.2 so that the diagnosis may be started for the circuit block 1-1. A terminal B of the FF 2-1 outputs the signal 1 to self-diagnose the circuit block 1-1 according to a signature analyzing method, etc.
After the completion of the diagnosis of the circuit block 1-1, the block 1-1 outputs the end signal EN.sub.1 and "GOOD" resultant signal G.sub.1. Here, "G.sub.1 =1" represents "GOOD" while "G.sub.1 =0" represents "NO GOOD." The same applies to the signals G.sub.2 and G.sub.3. Then, the resultant signal G.sub.1 is latched by the FF 3-1, and the end signal EN.sub.1 resets the FF 2-1 and starts the self-diagnosis of the circuit block 1-2.
In this way, the circuit blocks 1-1 to 1-3 are sequentially diagnosed. The "GOOD" resultant signals G.sub.1, G.sub.2 and G.sub.3 are sequentially latched by the FFs 3-1 to 3-3. Unless the reset signal R is inputted, the statuses of the FFs 3-1 to 3-3 are kept as they are. The contents of the FFs 3-1 to 3-3 are input to the AND gate 5.
The self-diagnosis end signal EN.sub.3 of the circuit block 1-3 will be an overall self-diagnosis end signal. This end signal EN 3 and an overall "GOOD" resultant signal G (G.sub.1 G.sub.2 G.sub.3 ) are sent to an upper level control block (not shown) in the VLSI to complete the self-diagnostic operation.
The upper level control block judges that all the circuit blocks that have been self diagnosed are normal if G=1 (i.e., G.sub.1 =1, G.sub.2 =1 and G.sub.3 =1), while the upper level control block judges that some of the circuit blocks are faulty if G=0.
There are many forms of self-diagnosis other than the conventional example mentioned in the above. For example, an output register of a certain circuit block to be self-diagnosed may commonly be used as an input register of the next circuit block to be diagnosed. If there are many (N pieces) circuit blocks to be self diagnosed, it is not necessary to provide a diagnosis execution indicating flip-flop (FF) for each of the N circuit blocks. Instead, it is possible to decode outputs of about log.sub.2 N numbers of FFs to indicate the execution of diagnosis. It is also possible to use only one FF to indicate the parallel execution of self-diagnoses of a plurality of circuit blocks. These superficial variations are not essential to the present invention, and the present invention is applicable to these variations.
According to the conventional self-diagnostic system described above, the circuit blocks are sequentially diagnosed. Namely, they are diagnosed in a go-or-no-go way. Accordingly, the conventional system is not appropriate for analyzing the quality of complicated logic circuits and not sufficient to carry out a complicated self-diagnosis.
In addition, the conventional diagnostic system cannot directly select a specific one among the circuit blocks but it will sequentially diagnose all the circuit blocks including the specific one.
As VLSIs become further integrated, complicated and functionally diverse, the self-diagnostic sequence is unavoidably complicated and expanded. Therefore, if the diagnostic sequence is disturbed in a certain block, diagnoses of the following blocks may be hindered to cause a serious problem.